勤益科大機構典藏:Item 987654321/2293
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    Please use this identifier to cite or link to this item: http://ir.lib.ncut.edu.tw/handle/987654321/2293


    Title: 具驅動輸出能力之高性能全加器設計
    High-Performance Full Adders with Driving-Output Ability
    Authors: 董秋溝;謝韶徽;黃國興;吳麗容
    Contributors: 電子工程系
    Department of Electronic Engineering
    Keywords: 全加器;進位傳遞延遲;加法器設計;通傳電晶體邏輯
    Date: 2003-07
    Issue Date: 2008-12-23 10:26:20 (UTC+8)
    Publisher: 勤益科技大學
    Abstract: 全加器在數位信號處理器與微處理器的設計上是很重要的元件。在本文中提出一新技術架構以建立一系列共16種新的具驅動輸出能力之全加器，這些新設計的全加器比傳統CMOS全加器[1]及Zhuang-Wu [2]所提出的全加器使用較少的電晶體數，而且有7種新的設計與Zhuang- Wu之電路比較起來具有更好的運算速度，其中最佳的設計更可節省22%的傳遞延遲時間。
    Relation: 勤益學報 21(1) p.107-115
    Appears in Collections:[National CHIN-YI University of Technology] 勤益學報

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