FPGA Implementation of a Recurrent Neural Fuzzy Network with On-Chip Learning for Prediction and Identification Applications

Please use this identifier to cite or link to this item: http://ir.lib.ncut.edu.tw/handle/987654321/6462

Title:	FPGA Implementation of a Recurrent Neural Fuzzy Network with On-Chip Learning for Prediction and Identification Applications
Authors:	林正堅
Contributors:	資訊工程系
Date:	2009-03
Issue Date:	2017-10-13 09:46:47 (UTC+8)
Abstract:	In this paper, a hardware implementation of a recurrent neural fuzzy network (RNFN) used for identification and prediction is proposed. A recurrent network is embedded in the RNFN by adding feedback connections in the second layer, where the feedback units act as memory elements. Although the back propagation (BP) learning algorithm is widely used in the RNFN, BP is too complicated to be implemented using hardware. However, we use the simultaneous perturbation method as a learning scheme for hardware implementation to overcome the above-mentioned problems. The hardware implementation of the RNFN uses random access memory (RAM), which stores all the parameters of a network. This design method reduces the number of logic gates used. The major findings of the experiment show that field programmable gate arrays (FPGA) implementation of the RNFN retains good performance in identification and prediction problems. (20 refs)
Relation:	Journal of Information Science and Engineering
Appears in Collections:	[Department of Computer Science and Information Engineering] 【資訊工程系所】期刊論文

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