Three Step Approach for Wafer Sawing Lane Inspection

NCUTIR > College of Electrical Engineering and Computer Science > Department of Electronic Engineering > 【電子工程系所】期刊論文 > Item 987654321/6540

Please use this identifier to cite or link to this item: http://ir.lib.ncut.edu.tw/handle/987654321/6540

Title:	Three Step Approach for Wafer Sawing Lane Inspection
Authors:	陳文淵
Contributors:	電子工程(學)系
Date:	2009-11
Issue Date:	2017-11-01 09:31:33 (UTC+8)
Abstract:	Wafer sawing performance must be closely monitored to ensure a satisfactory integrated circuits manufacturing yield. The inspection must allow the GO/NG decision to be fast and reliable, while also assuring that the training of the inspector is simple and not time consuming. The traditional neural-network approach to inspect images, while simple to implement, presents some disadvantages, including training efficiency and model effectiveness. Based on contour detection of the sawing lane, this work proposes a novel method combined with cross-center localization of sawing lanes, detection of sawing track, and four signatures to detect the abnormality of sawing effectively and timely. Our method does not need pretraining but runs faster and provides a better method with more effectiveness, higher flexibility, and immediate feedback to the sawing operation. An experiment using real data collected from an international semiconductor package factory is conducted to validate the performance of the proposed framework. The accurate acceptance rate and the accurate rejection rate are both 100%, while the false acceptance rate and false rejection rate are both zero as well. The results demonstrate that the proposed method is sound and useful for sawing inspection in industries.
Relation:	Optical Engineering
Appears in Collections:	[Department of Electronic Engineering] 【電子工程系所】期刊論文

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